1. Field
Various embodiments of the present invention relate to a complementary metal oxide semiconductor (CMOS) image sensor and, more particularly, to a method for reducing horizontal noise of the CMOS image sensor using a layout scheme and a comparing device.
2. Description of the Related Art
In CMOS image sensors using single-slope analog-to-digital converters, data is distorted by various noises. Noise may occur in both the pixel signals (outputted from the pixel array) and the ramp signal (outputted from a ramp signal generation device) when the data of each row of pixels is processed. This noise is called horizontal noise.
As the number of pixels in the CMOS image sensor increases, the pitch of the pixels is reduced. If the pitch is too small, passive elements (e.g., a capacitor) may not be able to be accommodated because the size of the passive element may be larger than the pixel pitch and the layout of interconnection lines for coupling the passive elements may be difficult.